A) Field of the Invention
The present invention relates to a capacitor, and more particularly to a capacitor of low inductance and large capacitance suitable for being used as a decoupling capacitor for absorbing noises generated in a large scale integrated circuit (LSI) operating at a high frequency.
In the present specification, a relative dielectric constant of 10 or larger is called a high dielectric constant.
B) Description of the Related Art
A capacitor is an important constituent element in a large scale integrated circuit (LSI) operating at a high frequency. For example, a method of lowering a power source impedance has been used by which a noise absorbing decoupling capacitor is connected in parallel with a power source to avoid malfunction to be caused by switching noises and the like.
A power source impedance Z is expressed by:Z(P)∝V/(nif)  (1)where “V” is a power source voltage, “n” is the number of elements per LSI, “i” is a switching current of an element, and “f” is an operation frequency.
A requested power source impedance is rapidly lowering because of the demands for lower voltage drive, higher integration of elements and higher frequency of LSI. An impedance Z(C) of a decoupling capacitor is expressed by:Z(C)=[R2+{2πfL−(½πfC}2]1/2  (2)where R is a resistance, L is an inductance, and C is a capacitance. It is desired that the capacitance C is increased and the inductance L is reduced in order to lower the impedance of a decoupling capacitor.
As a decoupling capacitor, laminated ceramic capacitors disposed around an LSI are generally used. A laminated ceramic capacitor has the structure that an electrode layer and a ceramic dielectric layer are alternately laminated and a pair of surface electrodes is formed in the sides of the capacitor and each surface electrode is connected to every second electrode layers. Although a large capacitance can be obtained, it is not easy to reduce inductance because the electrode layers are connected to the surface electrodes at the sides of the electrode layers.
As the operation frequency of LSI becomes high, a decoupling capacitor is required to have a low inductance. However, an approach of using laminated ceramic capacitors is severe.
A thin film capacitor is being developed as a low inductance capacitor. A thin film capacitor is formed in the following manner. For example, on a silicon substrate, electrode layers and a dielectric layer are formed, openings are formed selectively to an electrode layer, and a number of lead electrodes are formed connected to the electrode layer through the dielectric layer in a thickness direction via the openings. Solder bumps, for example, are formed on the lead electrodes to allow surface mount of the thin film capacitor. Since the distance between a terminal and each electrode point can be shortened, it is effective for reducing inductance. Since semiconductor manufacture processes can be used, size precision can be made high and a bump pitch can be shortened.
A dielectric thin film of a thin film capacitor can be made thin easily, which is advantageous in that capacitance per unit area of an electrode can be increased. If there is any defect in a thin dielectric layer, leak current is likely to increase. As compared with a laminated ceramic capacitor, it is more difficult to form a thin film capacitor of a multilayer structure. A thin dielectric film tends to lower its dielectric constant. Under these circumstances, it is not easy to form a thin film capacitor of large capacitance, as compared with a laminated ceramic capacitor.
Japanese Patent Laid-open Publication No. HEI-11-97289 proposes to form a dielectric layer by two processes using a sol-gel method. A second film forming process uses sol-gel source material having a low density. It reports that leak current can be reduced about one third by improving the quality of a polycrystalline dielectric layer.
The dielectric layer of a thin film capacitor has preferably a high dielectric constant. The higher the dielectric constant, the larger the capacitance of a capacitor having the same thickness and area. BaSrTiO3(BST) is often used as the material of a high dielectric constant dielectric layer. BST has a high dielectric constant, a low loss and a high breakdown voltage, providing excellent characteristics of stability and high frequency performance.
FIG. 7 shows an example of the structure of a thin film capacitor according to prior art. An insulating layer 52 of silicon oxide or the like is formed on the surface of a silicon substrate 51. On the insulating layer 52, a lower electrode 53 of Pt or the like is formed, and on the lower electrode 53, a high dielectric constant dielectric layer 54 of BST or the like is formed. On the dielectric layer 54, an upper electrode 59 or the like is formed.
The lower electrode 53 formed on the insulating layer 52 is generally polycrystalline. The high dielectric constant layer 54 formed on the polycrystalline lower electrode 53 becomes also polycrystalline. The polycrystalline dielectric layer 54 contains a number of grains and a grain boundary is formed between grains. Leak current is likely to flow through a grain boundary, and deteriorates the leak characteristics of the dielectric layer, i.e., its breakdown voltage.
If each polycrystalline grain forms a surface in conformity with the crystal habit boundary, surface smoothness of the dielectric layer 54 is lost. As the surface of the dielectric layer becomes more irregular, the uniformity of an electric field is degraded and an electric field concentration occurs, resulting also in deterioration of the leak characteristics or breakdown voltage.
If a dielectric layer made of a flat surface single crystal layer can be formed, it is possible to provide a thin film capacitor excellent in leak characteristics and breakdown voltage.
On a single crystal MgO substrate or single crystal SrTiO3(ST) substrate, a high dielectric constant dielectric layer of a perovskite structure can be formed. However, it is difficult to form such a single crystal substrate which is inexpensive and has a large area.
FIGS. 8A and 8B are graphs showing expected characteristics of a thin film capacitor using a single crystal dielectric layer.
FIG. 8A is a graph showing the leak characteristics of a thin film capacitor using a single crystal dielectric layer, as compared with a thin film capacitor using a polycrystalline dielectric layer. The abscissa represents a voltage applied to the capacitor in the unit of V in a linear scale, and the ordinate represents a leak current in the unit of A/cm2 in logarithmic scale. A curve p1 shows the leak characteristics of the thin film capacitor using a polycrystalline dielectric layer, and a curve p2 shows the leak characteristics of the thin film capacitor using a single crystal dielectric layer. As shown, it is expected that a leak current reduces considerably as grain boundaries are extinguished, i.e. when a single crystal dielectric layer is used.
FIG. 8B is a graph showing dependency of dielectric constant upon single crystal dielectric layer thickness as compared with dependency of dielectric constant upon polycrystalline dielectric layer thickness. The abscissa represents film thickness in the unit of nm in linear scale, and the ordinate represents specific dielectric constant in linear scale. A curve p2 shows a dependency of a dielectric constant upon polycrystalline dielectric film thickness. The polycrystalline dielectric layer greatly lowers its dielectric constant as the film thickness becomes 100 nm or thinner.
A curve s2 shows a dependency of dielectric constant upon single. crystal dielectric layer. The dielectric constant of single crystal dielectric layer is as a whole higher than that of a polycrystalline dielectric layer. Although the dielectric constant of the single crystal dielectric layer lowers as it becomes thinner, it is expected that the dielectric constant will not lower greatly as in the case of the polycrystalline dielectric layer.
As described above, thin film capacitors have been manufactured conventionally by using polycrystalline dielectric layers. If a polycrystalline dielectric layer can be replaced with a single crystal dielectric layer, the characteristics of a thin film capacitor can be improved considerably.